AI NPU VLSI Team Leader

Description

About the AI Division

The AI Division is a unique and dedicated group within Ceva, driving innovation in Machine Learning and Generative AI architectures for edge devices and cloud inference.

Our R&D domains span Neural Network Processors (NPU), Vision DSPs, and advanced AI algorithms for applications across smartphones, tablets, automotive, surveillance cameras and many more edge AI systems.

We combine cutting-edge hardware IP design with embedded software and system-level solutions, enabling the next generation of intelligent and energy-efficient devices.

About the role

The AI VLSI department develops top notch NPU that enables the execution of state-of-the-art LLMs, Generative AI models, and neural networks with exceptional performance, impacting multiple hardware and software teams across the company facing amazing PPAA challenges of the edge market.

In this role, as VLSI Team Leader in the AI VLSI department, you will lead a team of engineers developing cutting edge VLSI products such as – DSP, HW accelerators and AI Processors for the edge market, with full responsibility on the Front-End Design.

You will drive the development of robust, scalable, and efficient VLSI design, working closely with global Architecture, hardware simulator and Software teams to shape Ceva’s next generation of AI solutions.

We are looking for an exceptional hands-on leader with strong technical expertise, proven experience leading VLSI Front-End Design engineers, and a track record of delivering complex, state-of-the-art products on time and in production ready quality.

The ideal candidate is execution-driven, innovative, and passionate about building high-performing team and cutting-edge AI technology.

Responsibilities

Manage and lead a team of Front-End Design engineers.

Be accountable for the team’s development lifecycle, including architecture, development, validation, and release, focusing on meeting PPAA targets.

Lead development of advanced VLSI IPs for AI processors, DSP and HW accelerators while continuing pushing the VLSI design methodologies, procedures, sign off and AI tools assimilation to its next level.

Support system bring-up, debugging, and customer-facing activities when needed

Requirements

• B.Sc. in Electrical Engineering, or related field.
• 10 years of experience in Verilog/SV and Front-End design development.
• 3+ years leading a team of engineers.
• Experience managing multiple I/F with different groups within the company.
• Strong understanding of HW/SW interaction and system architecture.
• Superb knowledge in VLSI development on all if its aspects – VLSI Design, Verification, CAD, Emulation and Back end facing incredible challenges in PPAA targets.

Advantage:

• Experience with successful Tape out from architecture to tape out.
• Background in VLSI development, validation, CAD automation, and Backend closer.
• Familiarity with AI / Neural Networks / Generative AI workloads.
• Experience working with SW / hardware simulator / Architecture teams.
• M.Sc. or higher degree.